Automatic synthesis of locally-clocked asynchronous state machines

The authors describe a novel automated design methodology for asynchronous state-machine controllers. Using a local-clocking scheme, the method allows multiple input changes and produces hazard-free designs with a minimal or near-minimal number of states. The authors present an automated program for asynchronous state machine synthesis, and describe a new heuristic for state minimization and new optimizations to improve implementations. The program is used to synthesize competitive implementations of published designs; results are compared.<<ETX>>

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