A VLSI architecture for minimizing the transmission power in OFDM transceivers

This paper presents a VLSI architecture for optimizing the transmission power required in turbo-Coded Orthogonal Frequency Division Multiplexing modems. The technique adapts the transmission parameters according to the Quality of Service requirements. CORDIC computations are used to improve the VSLI area. The architecture performs at wire-speed, uses minimal area and has shown the performance gain in an indoor wireless application. An implementation using Field Programmable Gated Array technology has validated the results.