A UNISON framework for analyzing alternative strategies of IC final testing for enhancing overall operational effectiveness

Abstract Owing to capacity limit, yield demand, and cycle time reduction, determining proper strategy for the final testing of integrated circuits (IC) device is critical. Since none of the tests can perfectly distinguish good devices from bad, alternative testing strategies consisting of various setups and testing procedures affect the testing results and testing cycle time. However, this problem has seldom been addressed in literature. This study aims to construct a decision framework to analyze alternative testing strategies and thus derive the optimal strategy balancing operational efficiency, cost, and risk. This framework has been implemented in a semiconductor-testing firm in Taiwan. The results demonstrate practical viability of the proposed framework.

[1]  David Gauthier,et al.  An on-line data collection and analysis system for VLSI devices at wafer probe and final test , 1994, Proceedings., International Test Conference.

[2]  Robert C. Leachman.  Closed-loop measurement of equipment efficiency and equipment capacity , 1997 .

[3]  Ralph L. Keeney,et al.  Decisions with multiple objectives: preferences and value tradeoffs , 1976 .

[4]  F Sainfort,et al.  Evaluation of medical technologies: a generalized ROC analysis. , 1991, Medical decision making : an international journal of the Society for Medical Decision Making.

[5]  Costas J. Spanos,et al.  A general equipment diagnostic system and its application on photolithographic sequences , 1997 .

[6]  Chen-Fu Chien,et al.  A Portfolio-Evaluation Framework for Selecting R&D Projects , 2002 .

[7]  Douglas J. Mirizzi,et al.  Test SPC: a process to improve test system integrity , 1995, Proceedings of 1995 IEEE International Test Conference (ITC).

[8]  Chen Fu Chien.  Modifying the inconsistency of Bayesian networks and a comparison study for fault location on electricity distribution feeders , 2005 .

[9]  Wenqian Shang,et al.  A novel feature selection algorithm for text categorization , 2007, Expert Syst. Appl..

[10]  Chen-Fu Chien,et al.  Analyzing repair decisions in the site imbalance problem of semiconductor test machines , 2003 .

[11]  Ram Akella,et al.  In-line defect sampling methodology in yield management: an integrated framework , 1996 .

[12]  George Q. Huang,et al.  Distributed supply-chain project rescheduling: part II—distributed affected operations rescheduling algorithm , 2006 .

[13]  Chen-Fu Chien,et al.  A cost-based heuristic for statistically determining sampling frequency in a wafer fab , 2000, 2000 Semiconductor Manufacturing Technology Workshop (Cat. No.00EX406).

[14]  Wen-Chih Wang,et al.  Data mining for yield enhancement in semiconductor manufacturing and an empirical study , 2007, Expert Syst. Appl..

[15]  Chen-Fu Chien,et al.  Data value development to enhance competitive advantage: a retrospective study of EDA systems for semiconductor fabrication , 2003, Int. J. Serv. Technol. Manag..