Some sequential graph colouring algorithms for restricted channel routeing

Channel routeing, as originally envisaged, can be visualized as constrained colouring of a graph, called a horizontal constraint graph. We describe how this can be effective in real-life channel routeing problems with different kinds of simple heuristics. The problem, without heuristics, is actually combinatorially explosive in nature. Compared with certain benchmark problems, the algorithms give encouraging results. The redeeming features of the algorithms presented here are simplicity, with tolerable results at a faster speed and a classical approach reopened.

[1]  Amar Mukherjee,et al.  Introduction to Nmos and Cmos Vlsi Systems Design , 1986 .

[2]  Takeshi Yoshimura,et al.  Efficient Algorithms for Channel Routing , 1982, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[3]  Ronald C. Read,et al.  Graph theory and computing , 1972 .

[4]  Chi-Ping Hsu.  Minimum-Via Topological Routing , 1983, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[5]  Uzi Yoeli,et al.  A robust channel router , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  Akihiro Hashimoto,et al.  Wire routing by optimizing channel assignment within large apertures , 1971, DAC.

[7]  Narsingh Deo,et al.  Graph Theory with Applications to Engineering and Computer Science , 1975, Networks.

[8]  M. Bergman,et al.  "Introduction to nMOS and cMOS VLSI Systems Design" by Amar Mukherjee, from: Prentice-Hall, Englewood Cliffs, NJ 07632, U.S.A , 1986, Integr..

[9]  M. Golumbic.  Algorithmic graph theory and perfect graphs , 1980 .

[10]  Samir Kumar Bandyopadhyay,et al.  Some sequential graph colouring algorithms , 1989 .

[11]  David N. Deutsch.  A “DOGLEG” channel router , 1976, DAC 1976.

[12]  Jitender S. Deogun,et al.  Via minimization in VLSI routing with movable terminals , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..