Benchmarking time-dependent variability of junctionless nanowire FETs
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B. Kaczer | T. Grasser | G. Hellings | P. Weckx | D. Linten | G. Rzepa | J. Franco | A. Veloso | E. Bury | V. Putcha | M. Simicic | A. Chasin | A. Chasin | A. Veloso | P. Matagne | D. Linten | T. Grasser | G. Rzepa | B. Kaczer | J. Franco | P. Roussel | P. Weckx | Marko Simicic | G. Hellings | E. Bury | V. Putcha | Ph. Roussel | Ph. Matagne
[1] K. Sonoda,et al. Discrete Dopant Effects on Statistical Variation of Random Telegraph Signal Magnitude , 2007, IEEE Transactions on Electron Devices.
[2] N. Horiguchi,et al. On the distribution of the FET threshold voltage shifts due to individual charged gate oxide defects , 2016, International Integrated Reliability Workshop.
[3] H. Mertens,et al. Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates , 2016, 2016 IEEE Symposium on VLSI Technology.
[4] B. Kaczer,et al. Statistical model of the NBTI-induced threshold voltage, subthreshold swing, and transconductance degradations in advanced p-FinFETs , 2016, 2016 IEEE International Electron Devices Meeting (IEDM).
[5] Redner,et al. Anomalous voltage distribution of random resistor networks and a new model for the backbone at the percolation threshold. , 1985, Physical review. B, Condensed matter.
[6] T. Grasser,et al. Statistics of Multiple Trapped Charges in the Gate Oxide of Deeply Scaled MOSFET Devices—Application to NBTI , 2010, IEEE Electron Device Letters.
[7] E. Simoen,et al. Gate-all-around NWFETs vs. triple-gate FinFETs: Junctionless vs. extensionless and conventional junction devices with controlled EWF modulation for multi-VT CMOS , 2015, 2015 Symposium on VLSI Technology (VLSI Technology).
[9] Naoto Horiguchi,et al. Extraction of the Random Component of Time-Dependent Variability Using Matched Pairs , 2015, IEEE Electron Device Letters.
[10] Chi-Woo Lee,et al. Nanowire transistors without junctions. , 2010, Nature nanotechnology.
[11] A. Asenov. Random dopant induced threshold voltage lowering and fluctuations in sub-0.1 /spl mu/m MOSFET's: A 3-D "atomistic" simulation study , 1998 .
[12] M.J.M. Pelgrom,et al. Matching properties of MOS transistors , 1989 .
[13] R. Degraeve,et al. Origin of NBTI variability in deeply scaled pFETs , 2010, 2010 IEEE International Reliability Physics Symposium.
[14] C. Auth,et al. Bias temperature instability variation on SiON/Poly, HK/MG and trigate architectures , 2014, 2014 IEEE International Reliability Physics Symposium.
[15] Aaron Thean,et al. Superior Reliability of Junctionless pFinFETs by Reduced Oxide Electric Field , 2014, IEEE Electron Device Letters.
[16] Diederik Verkest,et al. Characterization and simulation methodology for time-dependent variability in advanced technologies , 2015, 2015 IEEE Custom Integrated Circuits Conference (CICC).
[17] Francky Catthoor,et al. Implications of BTI-Induced Time-Dependent Statistics on Yield Estimation of Digital Circuits , 2014, IEEE Transactions on Electron Devices.
[18] D. Frank,et al. Increasing threshold voltage variation due to random telegraph noise in FETs as gate lengths scale to 20 nm , 2006, 2009 Symposium on VLSI Technology.
[19] S. Rauch. The statistics of NBTI-induced V/sub T/ and /spl beta/ mismatch shifts in pMOSFETs , 2002 .
[20] N. Horiguchi,et al. Impact of single charged gate oxide defects on the performance and scaling of nanoscaled FETs , 2012, 2012 IEEE International Reliability Physics Symposium (IRPS).
[21] A. Thean,et al. On and off state hot carrier reliability in junctionless high-K MG gate-all-around nanowires , 2015, 2015 IEEE International Electron Devices Meeting (IEDM).
[22] K. Shepard,et al. Analysis of Random Telegraph Noise in 45-nm CMOS Using On-Chip Characterization System , 2013, IEEE Transactions on Electron Devices.
[23] T. Grasser,et al. Relevance of non-exponential single-defect-induced threshold voltage shifts for NBTI variability , 2013, 2013 IEEE International Integrated Reliability Workshop Final Report.