A 10-bit 50-MS/s SAR ADC with techniques for relaxing the requirement on driving capability of reference voltage buffers
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Soon-Jyh Chang | Chun-Po Huang | Guan-Ying Huang | Che-Hsun Kuo | Shao-Hua Wan | Goh Jih Ren | Kai-Tzeng Chiou | Cheng-Hsun Ho
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