Application and demonstration of a digital test core: optoelectronic test bed and wafer-level prober

Abstract A multi-purpose digital test core utilizing programmable logic has been introduced [1,2] to implement many of the functions of traditional automated test equipment (ATE). While previous papers have described the theory, this paper quantifies the results and presents additional applications with improved methods operating up to 4.4Gpbs. The digital test core provides a substantial number of programmable I/O for testing circuits and systems. It may be used either to enhance the capabilities of ATE or to provide autonomous testing within large systems or arrays of components. This technique has been expanded upon to produce greater functionality at higher frequencies. Based upon limitations of current ATE and BIST, the need for the digital test core is described. The test core concept is reviewed within an opto-electronic pattern generator and sampler with an eventual goal of terabit-per-second aggregate data rate. The performance of the device is discussed, and a second application of the digital test core is introduced as a nano-scale wafer-level embedded tester.