Two-dimensional analysis and design considerations of high-voltage planar junctions equipped with field plate and guard ring

The breakdown voltages of planar junctions (both nonpunchthrough and punchthrough cases) equipped with field plates and guard rings are determined by evaluating the ionization integral using the potential distribution computed by solving Poisson's equation in two-dimensions by a finite difference method. The influence of various parameters, such as substrate doping concentration, n-layer thickness, field oxide thickness, cylindrical junction curvature, field plate width, and the spacing between field plate and guard ring, on the breakdown voltage is extensively studied. It is shown that an optimum value exists for the field oxide thickness to realize maximum breakdown voltage. The study also shows that the optimum oxide thickness depends upon cylindrical junction curvature, substrate doping concentration, and n-layer thickness. It is further shown that the permittivity of a passivant dielectric layer deposited over field plate structure influences the breakdown voltage when breakdown takes place at the field plate edge. The numerical results are compared with the experimental data, and good agreement between the two is observed. Based on this two-dimensional study, design guidelines are provided for achieving breakdown voltages close to maximum realizable values, by conserving the device area and reducing the ionization at the field plant edge. The results presented clearly demonstrate the superiority of the field plate design using punchthrough structures over nonpunchthrough structures in realizing a given breakdown voltage. >

[1]  S. G. Chamberlain,et al.  Two-dimensional simulation of a high-voltage p-i-n diode with overhanging metallization , 1981, IEEE Transactions on Electron Devices.

[2]  Kyuwoon Hwang,et al.  Breakdown voltage optimization of silicon p-π-v planar junction diodes , 1984, IEEE Transactions on Electron Devices.

[3]  P. Rossel Power M.O.S. devices , 1984 .

[4]  V.P. O'Neil,et al.  Relation between oxide thickness and the breakdown voltage of a planar junction with field relief electrode , 1979, IEEE Transactions on Electron Devices.

[5]  A. Rusu,et al.  Deep-depletion breakdown voltage of silicon-dioxide/silicon MOS capacitors , 1979, IEEE Transactions on Electron Devices.

[6]  M. Conti,et al.  Surface breakdown in silicon planar diodes equipped with field plate , 1972 .

[7]  K. N. Bhat,et al.  Analytical solutions for the breakdown voltages of punched-through diodes having curved junction boundaries at the edges , 1980, IEEE Transactions on Electron Devices.

[8]  B. J. Baliga,et al.  P-channel, vertical insulated gate bipolar transistors with collector short , 1987, 1987 International Electron Devices Meeting.

[9]  F. A. Selim High-voltage, large-area planar devices , 1981, IEEE Electron Device Letters.

[10]  L. Clark,et al.  Enhancement of breakdown properties of overlay annular diodes by field shaping resistive films , 1972 .

[12]  Robert W. Dutton,et al.  Nonplanar VLSI device analysis using the solution of Poisson's equation , 1980 .

[13]  K. Bhat,et al.  Effect of lateral curvature on the breakdown voltage of planar diodes , 1985, IEEE Electron Device Letters.

[14]  R. C. Rustay,et al.  Theoretical basis for field calculations on multi-dimensional reverse biased semiconductor devices , 1982 .

[15]  S. Ghandhi Semiconductor power devices , 1977 .

[16]  M. Le Helley,et al.  Computer study of a high-voltage a p-π-n--n+diode and comparison with a field-limiting ring structure , 1986, IEEE Transactions on Electron Devices.

[17]  A. S. Grove,et al.  Effect of surface fields on the breakdown voltage of planar silicon p-n junctions , 1967 .

[18]  A. Rusu,et al.  Reversible breakdown voltage collapse in silicon gate-controlled diodes , 1980 .

[19]  R. V. Overstraeten,et al.  Measurement of the ionization rates in diffused silicon p-n junctions , 1970 .

[20]  E. Falck,et al.  The contour of an optimal field plate-an analytical approach , 1988 .

[21]  Y. Sugawara,et al.  Field reduction regions for compact high-voltage IC's , 1987, IEEE Transactions on Electron Devices.