Highly adaptive and deadlock-free routing for three-dimensional networks-on-chip
暂无分享,去创建一个
Terrence S. T. Mak | Alexandre Yakovlev | Nizar Dahir | Ra'ed Al-Dujaily | A. Yakovlev | T. Mak | Nizar Dahir | Ra'ed Al-Dujaily
[1] Eric Beyne,et al. 3D System Integration Technologies , 2006, 2006 International Symposium on VLSI Technology, Systems, and Applications.
[2] William J. Dally,et al. Principles and Practices of Interconnection Networks , 2004 .
[3] Lorena Anghel,et al. Message routing in 3D networks-on-chip , 2009, 2009 NORCHIP.
[4] Andrew A. Chien,et al. Compressionless Routing: A Framework for Adaptive and Fault-Tolerant Routing , 1997, IEEE Trans. Parallel Distributed Syst..
[5] Lionel M. Ni,et al. The turn model for adaptive routing , 1992, ISCA '92.
[6] Terrence S. T. Mak,et al. Deadlock-free and plane-balanced adaptive routing for 3D networks-on-chip , 2012, NoCArc '12.
[7] C. Mouli,et al. Future Fab , 2007, IEEE Spectrum.
[8] Shekhar Y. Borkar. 3D integration for energy efficient system design , 2006, 2009 Symposium on VLSI Technology.