EXPIDER: A Channel Routing Expert for VLSI Design

Abstract Channel routing plays an important role in VLSI (Very Large Scale Integration) design. Because of the ill-structured nature of the problem, algorithmic approaches fail to provide satisfactory solutions. Techniques using expert knowledge have been solicited and developed successfully. In this paper, we present an expert system, EXPIDER, for channel routing. Wires are placed on the tracks from the boundaries toward the middle of a channel on a track-by-track basis, with the help of weighted vertical constraint graphs. Heuristics are applied to escape from blocked states and to do directed routing without search. Tuning knowledge is provided to reduce the wire length and the number of vias. The routing area can be determined automatically without human intervention. The system was implemented in CLIPS (C Language Integrated Production System) and has been tested successfully on many cases. Some results, together with a comparison with other methods, are shown at the end of the paper.

[1]  Anne-Marie Tagant,et al.  A general and flexible switchbox router: CARIOCA , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  Akihiro Hashimoto,et al.  Wire routing by optimizing channel assignment within large apertures , 1971, DAC.

[3]  George Luger,et al.  Artificial Intelligence: Structures and Strategies for Complex Problem Solving (5th Edition) , 2004 .

[4]  Douglas A. Pucknell,et al.  Basic VLSI design (3rd ed.) , 1994 .

[5]  Kamran Eshraghian,et al.  Principles of CMOS VLSI Design: A Systems Perspective , 1985 .

[6]  S. Sitharama Iyengar,et al.  A general greedy channel routing algorithm , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[7]  Bryan D. Ackland,et al.  Physical Design Automation of Vlsi Systems , 1988 .

[8]  Jason Cong,et al.  Over-the-cell channel routing , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[9]  Douglas A. Pucknell,et al.  Basic VLSI Design , 1987 .

[10]  Alberto L. Sangiovanni-Vincentelli,et al.  A Detailed Router Based on Incremental Routing Modifications: Mighty , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[11]  Daniel P. Siewiorek,et al.  WEAVER: A Knowledge-Based Routing Expert , 1986 .

[12]  Michael Burstein,et al.  Hierarchical Wire Routing , 1983, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[13]  F. Hwang.  On Steiner Minimal Trees with Rectilinear Distance , 1976 .

[14]  Rostam Joobbani,et al.  Artificial Intelligence Approach to VLSI Routing , 1985 .

[15]  Kristian J. Hammond,et al.  Case-Based Planning: Viewing Planning as a Memory Task , 1989 .

[16]  Shi-Kuo Chang,et al.  The Generation of Minimal Trees with a Steiner Topology , 1972, JACM.

[17]  Jin-Tai Yan,et al.  CONVERGE: a circular-assignment-based switchbox router with via reduction , 1995 .

[18]  James P. Cohoon,et al.  BEAVER: a computational-geometry-based tool for switchbox routing , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[19]  Thomas G. Szymanski.  Dogleg Channel Routing is NP-Complete , 1985, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[20]  Wayne H. Wolf.  Modern VLSI design - a systems approach , 1994 .

[21]  Alfred V. Aho,et al.  Rectilinear steiner trees: Efficient special-case algorithms , 1977, Networks.

[22]  L. Zadeh.  The role of fuzzy logic in the management of uncertainty in expert systems , 1983 .

[23]  Takeshi Yoshimura,et al.  Efficient Algorithms for Channel Routing , 1982, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.