Direction-based routing methodology for irregular NoCs

This paper presents a general methodology for generating deadlock-free routing algorithms in irregular-based topologies. The proposed methodology can define several new efficient routing algorithms. The functionality and efficiency of the generated routing algorithms are evaluated by a discrete event simulator.

[1]  Antonio Robles,et al.  An effective methodology to improve the performance of the up*/down* routing algorithm , 2004, IEEE Transactions on Parallel and Distributed Systems.

[2]  Jie Wu,et al.  Deadlock-Free Routing In Irregular Networks Using Prefix Routing , 2003, Parallel Process. Lett..

[3]  Sudhakar Yalamanchili,et al.  Interconnection Networks: An Engineering Approach , 2002 .

[4]  H. Sarbazi-Azad,et al.  Performance evaluation of Butterfly on-Chip Network for MPSoCs , 2008, 2008 International SoC Design Conference.

[5]  Camino de Vera High-Performance Routing in Networks of Workstations with Irregular Topology , 2000 .

[6]  Olav Lysne,et al.  Layered routing in irregular networks , 2006, IEEE Transactions on Parallel and Distributed Systems.

[7]  H. Sarbazi-Azad,et al.  The Kautz mesh: A new topology for SoCs , 2008, 2008 International SoC Design Conference.

[8]  Hideharu Amano,et al.  L-turn routing: an adaptive routing in irregular networks , 2001, International Conference on Parallel Processing, 2001..

[9]  Michael Burrows,et al.  Autonet: A High-Speed, Self-Configuring Local Area Network Using Point-to-Point Links , 1991, IEEE J. Sel. Areas Commun..

[10]  José Duato,et al.  Logic-Based Distributed Routing for NoCs , 2008, IEEE Computer Architecture Letters.

[11]  Cruz Izu,et al.  High-performance adaptive routing for networks with arbitrary topology , 2006, J. Syst. Archit..

[12]  José Duato,et al.  A General Theory for Deadlock-Free Adaptive Routing Using a Mixed Set of Resources , 2001, IEEE Trans. Parallel Distributed Syst..