Compact associative-memory architecture with fully parallel search capability for the minimum Hamming distance
暂无分享,去创建一个
Hans Jurgen Mattausch | T. Gyohten | Tetsushi Koide | Yoshihiro Soda | H. Mattausch | T. Koide | T. Gyohten | Y. Soda
[1] L. G. Johnson,et al. Associative IC memories with relational search and nearest-match capabilities , 1992 .
[2] Donald R. Tveter. The pattern recognition basis of artificial intelligence , 1998 .
[3] Takeshi Ogura,et al. A 1K bit Associative Memory LSI , 1982 .
[4] Ramon G. Carvajal,et al. High-speed high-precision min/max circuits in CMOS technology , 2000 .
[5] T. Morimoto,et al. A fully-parallel vector quantization processor for real-time motion picture compression , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.
[6] L.D. Jackel,et al. Analog electronic neural network circuits , 1989, IEEE Circuits and Devices Magazine.
[7] Allen Gersho,et al. Vector quantization and signal compression , 1991, The Kluwer international series in engineering and computer science.
[8] Joseph L. Mundy,et al. Low-cost associative memory , 1972 .
[9] J. T. Koo. Integrated-circuit content-addressable memories , 1970 .
[10] K. Kotani,et al. A parallel vector-quantization processor eliminating redundant calculations for real-time motion picture compression , 2000, IEEE Journal of Solid-State Circuits.
[11] M. Ikeda,et al. Time–domain minimum–distance detector and its application to low power coding scheme on chip interface , 1998, Proceedings of the 24th European Solid-State Circuits Conference.
[12] H.J. Mattausch,et al. An architecture for compact associative memories with deca-ns nearest-match capability up to large distances , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).
[13] R. Igarashi,et al. A 150-nanosecond associative memory using integrated MOS transistors , 1966 .
[14] John Lazzaro,et al. Winner-Take-All Networks of O(N) Complexity , 1988, NIPS.