A 70-500MHz Programmable CMOS Filter Compensated for MOS Nonquasistatic Effects

We present a fifth order Chebyshev singly-terminated ladder filter with a band-edge frequency programmable from 70-500 MHz implemented in a 0.35 mum CMOS process. It uses constant-capacitance scaled Gm-C integrators, and features a technique for compensation of MOS nonquasistatic effects. Also incorporated in the design is a robust fixed-transconductance bias circuit. The filter has a dynamic range of 52 dB and consumes 100 mW from a 3.3 V supply

[1]  E. Sanchez-Sinencio,et al.  A practical quality factor tuning scheme for IF and high-Q continuous-time filters , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

[2]  Y. Tsividis.  Operation and modeling of the MOS transistor , 1987 .

[3]  A. Xotta,et al.  A 1 GHz CMOS analog front-end for a generalized PRML read channel , 2005, IEEE Journal of Solid-State Circuits.

[4]  Edgar Sánchez-Sinencio,et al.  An Accurate Quality Factor Tuning Scheme for IF and High-Q Continuous-Time Filters , 1999 .

[5]  Y.P. Tsividis,et al.  Widely programmable high-frequency continuous-time filters in digital CMOS technology , 2000, IEEE Journal of Solid-State Circuits.

[6]  Shanthi Pavan.  A fixed transconductance bias technique for CMOS analog integrated circuits , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).