论文信息 - Algorithms and Architectures for Use in FPGA Implementations of Identity Based Encryption Schemes

Algorithms and Architectures for Use in FPGA Implementations of Identity Based Encryption Schemes

In this paper algorithms and architectures for new GF(3 m ) multiplier and inverter components are presented. It is described how they can be utilized as part of a hardware implementation of an Identity Based Encryption (IBE) scheme. The main computation, the Tate pairing in such a scheme in outlined and it is illustrated how it can be implemented on reconfigurable hardware using these components.

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