Analysis and Evaluation of PUF-Based SoC Designs for Security Applications

This paper presents a critical analysis and statistical evaluation of two categories of physically unclonable functions (PUFs): ring oscillator PUF and a new proposed adapted latch-based PUF. The main contribution is that of measuring the properties of PUF which provide the basic information for using them in security applications. The original method involved the conceptual design of adapted latch-based PUFs and ring oscillator PUFs in combination with peripheral devices in order to create an environment for experimental analysis of PUF properties. Implementation, testing, and analysis of results followed. This approach has applications on high-level security.

[1]  Mitsugu Iwamoto,et al.  Variety enhancement of PUF responses using the locations of random outputting RS latches , 2012, Journal of Cryptographic Engineering.

[2]  Mark Mohammad Tehranipoor,et al.  Novel Physical Unclonable Function with process and environmental variations , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[3]  E. Simpson Offline HW / SW Authentication for Reconfigurable Platforms , 2006 .

[4]  Srinivas Devadas,et al.  FPGA PUF using programmable delay lines , 2010, 2010 IEEE International Workshop on Information Forensics and Security.

[5]  Yu-Jung Huang,et al.  Efficient Implementation of RFID Mutual Authentication Protocol , 2012, IEEE Transactions on Industrial Electronics.

[6]  Reza Azarderakhsh,et al.  Efficient Fault Diagnosis Schemes for Reliable Lightweight Cryptographic ISO/IEC Standard CLEFIA Benchmarked on ASIC and FPGA , 2013, IEEE Transactions on Industrial Electronics.

[7]  João Paulo Teixeira,et al.  Modeling the Effect of Process, Power-Supply Voltage and Temperature Variations on the Timing Response of Nanometer Digital Circuits , 2012, J. Electron. Test..

[8]  Klaus D. Müller-Glaser,et al.  Exploration of Uninitialized Configuration Memory Space for Intrinsic Identification of Xilinx Virtex-5 FPGA Devices , 2012, Int. J. Reconfigurable Comput..

[9]  Sasan Khoshroo Design and Evaluation of FPGA-based Hybrid Physically Unclonable Functions , 2013 .

[10]  María José Moure,et al.  Features, Design Tools, and Application Domains of FPGAs , 2007, IEEE Transactions on Industrial Electronics.

[11]  Tim Güneysu,et al.  Enabling SRAM-PUFs on Xilinx FPGAs , 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

[12]  Jean-Pierre Deschamps,et al.  Efficient Elliptic Curve Point Multiplication Using Digit-Serial Binary Field Operations , 2013, IEEE Transactions on Industrial Electronics.

[13]  Shuichi Ichikawa,et al.  FPGA Implementation of Metastability-Based True Random Number Generator , 2009, IEICE Trans. Inf. Syst..

[14]  Dawu Gu,et al.  Helper Data Algorithms for PUF-Based Key Generation: Overview and Analysis , 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[15]  Srinivas Devadas,et al.  FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control , 2011, CHES.

[16]  Qiang Zhou,et al.  Techniques for Design and Implementation of an FPGA-Specific Physical Unclonable Function , 2016, Journal of Computer Science and Technology.

[17]  Jorge Guajardo,et al.  Brand and IP protection with physical unclonable functions , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[18]  Alexandra Stanciu,et al.  Generating an unique identifier for FPGA devices , 2014, 2014 International Conference on Optimization of Electrical and Electronic Equipment (OPTIM).

[19]  Qiang Zhou,et al.  A Survey on Silicon PUFs and Recent Advances in Ring Oscillator PUFs , 2014, Journal of Computer Science and Technology.

[20]  David Naccache,et al.  Towards Hardware-Intrinsic Security - Foundations and Practice , 2010, Information Security and Cryptography.

[21]  Miodrag Potkonjak,et al.  Device aging-based physically unclonable functions , 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).