A 2 GHz subharmonic sampler for signal downconversion

Subharmonic sampling is a discrete-time alternative for the signal downconversion problem. It can be used either to replace a traditional continuous-time mixer in a superheterodyne receiver or can be combined with other discrete-time analog signal processing blocks in novel receiver architectures. We present a 2 GHz bandwidth integrated mixer based on subharmonic sampling. The sampler uses a two-diode topology with a 3 V supply. The downconversion loss for the passive sampler is 1 dB and the total system gain 3 dB. The mixer achieves IIP3 of +16 dBm and -1 dB compression +7 dBm for a single-tone input.

[1]  Bruce A. Wooley,et al.  A 900-MHz RF front-end with integrated discrete-time filtering , 1996, IEEE J. Solid State Circuits.

[2]  A. Brown,et al.  Digital L-band receiver architecture with direct RF sampling , 1994, Proceedings of 1994 IEEE Position, Location and Navigation Symposium - PLANS'94.

[3]  Mark J. W. Rodwell,et al.  275 GHz 3-mask integrated GaAs sampling circuit , 1990 .

[4]  G. Seehausen Generating short pulses using delay line coupled GaAs nor gates , 1992 .

[5]  Dennis M. Akos,et al.  Design and implementation of a direct digitization GPS receiver front end , 1996 .

[6]  P. M. Asbeck,et al.  A 2Gs/s HBT sample and hold , 1988, 10th Annual IEEE (GaAs IC) Symposium, Gallium Arsenide Integrated Circuit. Technical Digest 1988..

[7]  Asad A. Abidi Direct-conversion radio transceivers for digital communications , 1995 .

[8]  Josef Sauerer,et al.  An 800 MSps track and hold using a 0.3 /spl mu/m AlGaAs-HEMT-technology , 1994, Proceedings of 1994 IEEE GaAs IC Symposium.

[9]  A. Rofougaran,et al.  A Highly Linear 1-GHz CMOS Downconversion Mixer , 1993, ESSCIRC '93: Nineteenth European Solid-State Circuits Conference.

[10]  R. Brodersen,et al.  A low-power CMOS chipset for spread spectrum communications , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.