Real-time H.264 encoding of high-definition (HD) video (up to 1080p) is a challenge workload to most existing programmable processors. Instead, the novel programmable parallel processors such as stream processor, Graphic processor unit (GPU) and DSP offer a different and very promising technology for these demands. Thus, parallel computing for H.264 encoding on these processors is becoming a hot research point. It's challenged, because most emerging parallel processors focus on supporting Data Level Parallel (DLP), while the dependency inherently existing in traditional H.264 encoding algorithm significantly restricts exploiting DLP. Facing the challenge, this paper presents data parallel processing methods for key modules of H.264 encoder which can eliminate the dependency restriction. The result shows that key modules including Intra-prediction, Inter-prediction and CAVLC achieve significant speedup on stream processor by using these data parallel processing methods.
[1]
Scott Rixner,et al.
Stream Processor Architecture
,
2001
.
[2]
Liang-Gee Chen,et al.
Hardware architecture design of an H.264/AVC video codec
,
2006,
Asia and South Pacific Conference on Design Automation, 2006..
[3]
Wei Wu,et al.
Software parallel CAVLC encoder based on stream processing
,
2009,
2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia.
[4]
Peter Mattson,et al.
A programming system for the imagine media processor
,
2002
.
[5]
Mateo Valero,et al.
HD-VideoBench. A Benchmark for Evaluating High Definition Digital Video Applications
,
2007,
2007 IEEE 10th International Symposium on Workload Characterization.