A 10-b 20-Msample/s analog-to-digital converter

A 10-b 20-Msample/s analog-to-digital converter fabricated in a 0.9- mu m CMOS technology is described. The converter uses a pipelined nine-stage architecture with fully differential analog circuits and achieves a signal-to-noise-and-distortion ratio (SNDR) of 60 dB with a full-scale sinusoidal input at 5 MHz. It occupies a 8.7 mm/sup 2/ and dissipates 240 mW. >

[1]  B. Zojer,et al.  A 10 b 75 MHz subranging A/D converter , 1990, 1990 37th IEEE International Conference on Solid-State Circuits.

[2]  J.G. Peterson,et al.  A monolithic video A/D converter , 1979, IEEE Journal of Solid-State Circuits.

[3]  S. H. Lewis,et al.  A pipelined 5-Msample/s 9-bit analog-to-digital converter , 1987 .

[4]  J. Marsh,et al.  A 10 bit 75 mega-sample per second A/D converter , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.

[5]  Beomsup Kim,et al.  A 13b 2 . 5-MHz Self-calibrated Pipelined A / D Converter in 3pm CMOS , .

[6]  Germano Nicollini,et al.  A fully differential sample-and-hold circuit for high-speed applications , 1989 .

[7]  S.H. Lewis,et al.  A pipelined 9-stage video-rate analog-to-digital converter , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.

[8]  Gabor C. Temes.  High-accuracy pipeline A/D convertor configuration , 1985 .

[9]  C. Mangelsdorf,et al.  A wideband 10-bit, 20 Msps pipelined ADC using current-mode signals , 1990, 1990 37th IEEE International Conference on Solid-State Circuits.

[10]  Michael J. Demler.  High-speed analog-to-digital conversion , 1991 .

[11]  P. Gray,et al.  High-frequency CMOS switched-capacitor filters for communications application , 1983 .

[12]  Paul R. Gray,et al.  A pipelined 13-bit 250-ks/s 5-V analog-to-digital converter , 1988 .

[13]  M. F. Tompsett,et al.  A 10-b 15-MHz CMOS recycling two-step A/D converter , 1990 .

[14]  A. Matsuzawa,et al.  A 10 b 30 MHz two-step parallel BiCMOS ADC with internal S/H , 1990, 1990 37th IEEE International Conference on Solid-State Circuits.

[15]  C.A. Laber,et al.  A family of differential NMOS analog circuits for a PCM codec filter chip , 1982, IEEE Journal of Solid-State Circuits.

[16]  Bang-Sup Song,et al.  A 12-bit 1-Msample/s capacitor error-averaging pipelined A/D converter , 1988 .

[17]  Paul R. Gray,et al.  A 13-b 2.5-MHz self-calibrated pipelined A/D converter in 3- mu m CMOS , 1991 .