Power Efficient Model of PWM Generator for Green Computing and Communication on High Performance FPGAs

PWM generator is one of the core modules of a communication model. Its main function is to control the amplitude of signal and used for reducing average power of the pulses and signals. The PWM generator can also be used in promoting the green computing and green communication other than data and wireless communication if it is made power and energy efficient. In this work we are using different Stub Series Terminated Logic (SSTL) IO with three distinguished FPGAs of different Nano meter (nm) gate size that are 28 nm SPARTAN-7, 20 nm KINTEX-7 Ultra scale, and 16 nm ZYNQ Ultra scale+. The model has been synthesized and implemented on VIVADO ISE tool. From the power analysis it is observed that 16 nm ZYNQ Ultra scale+ requires the highest amount of power for operation with SSTL18_I IO and 28 nm SPARTAN-7 uses least amount of power for the operation with SSTL135 IO, while the 20 nm KINTEX-7 Ultra scale lies in mid of both of these devices.