Combining Model Checking and Testing in a Continuous HW/SW Co-verification Process

SystemC is widely used for modeling and simulation in hardware/software co-design. However, the co-verification techniques used for SystemC designs are mostly ad-hoc and non-systematic. In this paper, we present an approach to overcome this problem by a systematic, formally founded quality assurance process. Based on a combination of model checking and conformance testing, we obtain a HW/SW co-verification flow that supports HW/SW co-development throughout the whole design process. In addition, we present a novel test algorithm that generates conformance tests for SystemC designs offline and that can cope with non-deterministic systems. To this end, we use a timed automata model of the SystemC design to compute expected simulation or test results. We have implemented the model checking and conformance testing framework and give experimental results to show the applicability of our approach.

[1]  Ashraf Salem Formal semantics of synchronous SystemC , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[2]  Rolf Drechsler,et al.  HW/SW co-verification of embedded systems using bounded model checking , 2006, GLSVLSI '06.

[3]  Sofiène Tahar,et al.  Generating Finite State Machines from System C , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[4]  Andreas Podelski,et al.  ACSAR: Software Model Checking with Transfinite Refinement , 2007, SPIN.

[5]  Rachel Cardell-Oliver Conformance Tests for Real-Time Systems with Timed Automata Specifications , 2000, Formal Aspects of Computing.

[6]  Sandeep K. Shukla,et al.  Model-Driven Validation of SystemC Designs , 2008, EURASIP J. Embed. Syst..

[7]  Kim G. Larsen,et al.  A Tutorial on Uppaal , 2004, SFM.

[8]  Rolf Drechsler,et al.  Checkers for SystemC designs , 2004, Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04..

[9]  Sofiène Tahar,et al.  An Approach for the Verification of SystemC Designs Using AsmL , 2005, ATVA.

[10]  Wolfgang Rosenstiel,et al.  An ASM based systemC simulation semantics , 2003 .

[11]  Kim Guldstrand Larsen,et al.  Formal Methods for the Design of Real-Time Systems , 2004, Lecture Notes in Computer Science.

[12]  Christian Steger,et al.  Specification-based Verification of Embedded Systems by Automated Test Case Generation , 2008, DIPES.

[13]  Rajeev Alur,et al.  A Theory of Timed Automata , 1994, Theor. Comput. Sci..

[14]  Stavros Tripakis,et al.  Real-Time Testing with Timed Automata Testers and Coverage Criteria , 2004, FORMATS/FTRTFT.

[15]  Wang Yi,et al.  UPPAAL - a Tool Suite for Automatic Verification of Real-Time Systems , 1996, Hybrid Systems.

[16]  Wolfgang Rosenstiel,et al.  The simulation semantics of SystemC , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

[17]  A. Baschirotto,et al.  A 600mV 1.32mW 75dB-DR 4/sup th/-order baseband analog filter for UMTS receivers , 2005, Research in Microelectronics and Electronics, 2005 PhD.

[18]  Jan Tretmans,et al.  On-the-fly conformance testing using SPIN , 2000, International Journal on Software Tools for Technology Transfer.

[19]  Brian Nielsen,et al.  Formal Approaches to Software Testing, 4th International Workshop, FATES 2004, Linz, Austria, September 21, 2004, Revised Selected Papers , 2005, FATES.

[20]  Wolfgang Reisig,et al.  Lectures on Concurrency and Petri Nets , 2003, Lecture Notes in Computer Science.

[21]  Petru Eles,et al.  Formal Verification of SystemC Designs Using a Petri-Net Based Representation , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[22]  Wang Yi,et al.  Timed Automata: Semantics, Algorithms and Tools , 2003, Lectures on Concurrency and Petri Nets.

[23]  Kim G. Larsen,et al.  Testing Real-Time Systems Using UPPAAL , 2008, Formal Methods and Testing.

[24]  Brian Nielsen,et al.  Automated Test Generation from Timed Automata , 2001, TACAS.

[25]  Yassine Lakhnech,et al.  Formal Techniques, Modelling and Analysis of Timed and Fault-Tolerant Systems , 2004, Lecture Notes in Computer Science.

[26]  Frits W. Vaandrager,et al.  Testing timed automata , 1997, Theor. Comput. Sci..

[27]  Kim G. Larsen,et al.  Time-Optimal Real-Time Test Case Generation Using Uppaal , 2003, FATES.

[28]  Rajeev Alur,et al.  A Temporal Logic of Nested Calls and Returns , 2004, TACAS.

[29]  David S. Rosenblum Formal methods and testing: why the state-of-the art is not the state-of-the practice , 1996, SOEN.

[30]  K. Larsen,et al.  Online Testing of Real-time Systems Using Uppaal , 2004, FATES.

[31]  Wolfgang Rosenstiel,et al.  SystemC: methodologies and applications , 2003 .

[32]  Paula Herber,et al.  Model checking SystemC designs using timed automata , 2008, CODES+ISSS '08.

[33]  Florence Maraninchi,et al.  A SystemC/TLM Semantics in Promelaand Its Possible Applications , 2007, SPIN.

[34]  Bernd Kleinjohann,et al.  Distributed Embedded Systems: Design, Middleware and Resources , 2010 .

[35]  Kim G. Larsen,et al.  Time-Optimal Test Cases for Real-Time Systems , 2003, FORMATS.

[36]  Peter Liggesmeyer,et al.  Achieving communication coverage in testing , 2006, SOEN.