A Programmable Adaptive Router for a GALS Parallel System

This paper describes a router which is the key component of a scalableasynchronous on-chip and inter-chip communication infrastructure foran application-specific parallel computing system. We use this systemas a universal platform for real time simulations of large-scaleneural networks. The communications router supports multiple routingalgorithms, and is pipelined to boost its throughput. The designconsiderations emphasize programmability and adaptiverouting. Programmability offers a highly configurable architecturesuited to a range of different applications. Adaptive routingoffers a fault-tolerance capability that is highly desirable for large-scaledigital computational systems. In addition, many neural applicationsare inherently fault-tolerant. Therefore, the router may selectivelydrop some packets in order to maintain a reasonable Quality of Service(QoS). The design objectives are achieved through the use of asynchronous elastic pipeline controlled by a handshake protocol whichgives the flexibility to stall the traffic flow during run-time forconfiguration and other purposes, or to redirect the traffic flow toan alternative link to reroute around a failed or congested link.

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