AMT 2.0: qualitative and quantitative trace analysis with extended signal temporal logic
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[1] Thomas A. Henzinger,et al. The benefits of relaxing punctuality , 1991, PODC '91.
[2] Paul Caspi,et al. A Kleene theorem for timed automata , 1997, Proceedings of Twelfth Annual IEEE Symposium on Logic in Computer Science.
[3] Dejan Nickovic,et al. Parametric Identification of Temporal Properties , 2011, RV.
[4] Garvit Juniwal,et al. Robust online monitoring of signal temporal logic , 2015, Formal Methods in System Design.
[5] François Fages,et al. BIOCHAM: an environment for modeling biological systems and formalizing experimental knowledge , 2006, Bioinform..
[6] Dejan Nickovic,et al. AMT: A Property-Based Monitoring Tool for Analog Systems , 2007, FORMATS.
[7] Dejan Nickovic,et al. Monitoring properties of analog and mixed-signal circuits , 2012, International Journal on Software Tools for Technology Transfer.
[8] Dejan Nickovic,et al. Specification-Based Monitoring of Cyber-Physical Systems: A Survey on Theory, Tools and Applications , 2018, Lectures on Runtime Verification.
[9] Dejan Nickovic,et al. Monitoring Temporal Properties of Continuous Signals , 2004, FORMATS/FTRTFT.
[10] Paul Caspi,et al. Timed regular expressions , 2002, JACM.
[11] Dejan Nickovic,et al. Localizing Faults in Simulink/Stateflow Models with STL , 2018, HSCC.
[12] Dejan Nickovic,et al. AMT 2.0: qualitative and quantitative trace analysis with extended signal temporal logic , 2018, International Journal on Software Tools for Technology Transfer.
[13] O Henriksen,et al. T1, T2, and concentrations of brain metabolites in neonates and adolescents estimated with H‐1 MR spectroscopy , 1994, Journal of magnetic resonance imaging : JMRI.
[14] David A. Basin,et al. Almost Event-Rate Independent Monitoring of Metric Dynamic Logic , 2017, RV.
[15] Oded Maler,et al. Robust Satisfaction of Temporal Logic over Real-Valued Signals , 2010, FORMATS.
[16] Dejan Nickovic,et al. Measuring with Timed Patterns , 2015, CAV.
[17] Sriram Sankaranarayanan,et al. S-TaLiRo: A Tool for Temporal Logic Falsification for Hybrid Systems , 2011, TACAS.
[18] Dogan Ulus. Montre: A Tool for Monitoring Timed Regular Expressions , 2017, CAV.
[19] Dejan Nickovic,et al. Trace Diagnostics Using Temporal Implicants , 2015, ATVA.
[20] Dejan Nickovic,et al. Assertion-based monitoring in practice - Checking correctness of an automotive sensor interface , 2016, Sci. Comput. Program..
[21] Ron Koymans,et al. Specifying real-time properties with metric temporal logic , 1990, Real-Time Systems.
[22] Pieter J. Mosterman,et al. Requirements-Based Testing in Aircraft Control Design , 2005 .
[23] Alexandre Donzé,et al. Breach, A Toolbox for Verification and Parameter Synthesis of Hybrid Systems , 2010, CAV.
[24] Dana Fisman,et al. A Practical Introduction to PSL , 2006, Series on Integrated Circuits and Systems.
[25] Dogan Ulus,et al. Timed Pattern Matching , 2014, FORMATS.
[26] Srikanth Vijayaraghavan,et al. A practical guide for system Verilog assertions , 2005 .