A FPGA vernier digital-to-time converter with 3.56ps resolution and −0.23∼+0.2LSB inaccuracy

A simple but powerful digital-to-time converter, or digital pulse generator, realizable with FPGA chips is proposed. Based on Vernier principle, the effective resolution is made equivalent to the period difference of two phase-locked loop (PLL) outputs and is achieved as fine as 3.56 ps with Altera Stratix II GX FPGA chips. The programmable delay range wider than ever is verified to be 33.4 minutes. The measured integral nonlinearity (INL) is between - 0.23 LSB to 0.2 LSB (-0.8 ps~0.7 ps). It ensures every input bit is valid under such fine resolution. Only two embedded PLLs and some standard logic cells are required for circuit realization. Compared with its predecessorspsila, both design effort and chip cost of the proposed converter are lowered substantially.

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