A 1.8 V 700 Mb/s/pin 512 Mb DDR-II SDRAM with on-die termination and off-chip driver calibration
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S. Cho | H. Lee | H.-C. Choi | C. Yoo | K. Kyung | G.-H. Han | K. Lim | J. Chai | N.-W. Heo | G. Byun | D.-J. Lee | H.-I. Choi | C.-H. Kim
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