A CMOS 4-bit MDAC with self-calibrated 14-bit linearity for high-resolution pipelined A/D converters
暂无分享,去创建一个
[1] Bang-Sup Song,et al. Digital-domain calibration of multistep analog-to-digital converters , 1992 .
[2] Paul R. Gray,et al. A 13-b 2.5-MHz self-calibrated pipelined A/D converter in 3- mu m CMOS , 1991 .
[3] S.-H. Lee,et al. A direct code error calibration technique for two-step flash A/D converters , 1989 .
[4] Jose E. Franca,et al. An analogue self-calibration technique for high-resolution video-rate pipelined A/D converters , 1995, 38th Midwest Symposium on Circuits and Systems. Proceedings.
[5] T. R. Viswanathan,et al. Switched-capacitor integrator with reduced sensitivity to amplifier gain , 1986 .
[6] Bang-Sup Song,et al. Interstage gain proration technique for digital-domain multi-step ADC calibration , 1994 .
[7] João Goes,et al. Optimum resolution-per-stage in high-speed pipelined A/D converters using self-calibration , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.
[8] J. Goes,et al. High-linearity calibration of low-resolution digital-to-analog converters , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.
[9] Seung-Hoon Lee,et al. Simplified digital calibration for multi-stage analog-to-digital converters , 1993, 1993 IEEE International Symposium on Circuits and Systems.
[10] S. H. Lewis,et al. A pipelined 5-Msample/s 9-bit analog-to-digital converter , 1987 .