An analysis of process fluctuation induced propagation delay variation using analytical model

Abstract The parametric yield of VLSI depends strongly on the statistical process fluctuations. Using an analytical model, this paper analyzes the relations between process fluctuations and circuit performance variations, namely, process-to-device and device-to-circuit response surfaces. It is found that the worst-cases for the channel length L, the gate insulator thickness tox, and the channel impurity concentration Nchn corresponded to those for the ring oscillator propagation delay τpd when the drain current was estimated using the saturation velocity vsat, since the response surfaces for L-to-τpd, τox-to-τpd and Nchn-to-τpd were monotonic. The fluctuations of L resulted in a lower tail of the distribution of the NMOS threshold voltage Vthn due to the short-channel effect and a higher tail of the drain saturation current Idn. However, the distribution of τpd was nearly normal, as the probability of the normal distribution (the P-value) was greater than 5%. This is because the influence of L on τpd was mainly due to the gate capacitance Cg. Also, the non-linear relation between L and Vthn was cancelled by the non-linear Idn-to-τpd response surface.