IMPROVED CHARACTERIZATION OF FULLY-DEPLETED SOI WAFERS BY PSEUDO-MOS TRANSISTOR

Abstract The pseudo-MOS transistor technique is used for quick, quasi-non destructive evaluation and comparison of several types of SOI wafers: SIMOX from different origins and wafer bonding. The effective mobility for electrons and holes, threshold voltages, film doping, interface state density and series resistances are extracted as a function of probes pressure (15–50 g). The form factor of the pseudo-MOS is accurately evaluated by comparison with four-point probe measurement taking into account the correction induced by series resistances.