论文信息 - An optimum hardware detector for constant envelope quadrature-quadrature phase-shift keying (CEQ/sup 2/PSK)

An optimum hardware detector for constant envelope quadrature-quadrature phase-shift keying (CEQ/sup 2/PSK)

A hardware detector for constant envelope quadrature-quadrature phase-shift keying (CEQ/sup 2/PSK) is proposed. It uses appropriate hard decisions; yet, it achieves optimum probability of bit error performance, unlike the suboptimum detector of Saha and Birdsall. This optimum performance is verified through Monte Carlo computer simulations. Additionally, a more correct expression is given for the probability of bit error performance for CEQ/sup 2/PSK, which gives the gain over nonconstant Q/sup 2/PSK as 1.44 dB, rather than the previously published value of 1.76 dB.

Edit J. Kaminsky | Kenneth V. Cartwright

[1] L.P. Linde,et al. A synchronous Q/sup 2/PSK DS-CDMA system: system conceptualisation, implementation and performance analysis , 1998, 1988 IEEE 5th International Symposium on Spread Spectrum Techniques and Applications - Proceedings. Spread Technology to Africa (Cat. No.98TH8333).

[2] L. P. Linde,et al. RATE-1/2 TRELLIS CODING FOR Q2PSK OPERATING ON THE RICIAN FADING CHANNEL , 1998 .

[3] R. A. Carrasco,et al. A new digital implementation of quadrature-quadrature phase shift keying , 1991 .

[4] P. Balaban,et al. A Modified Monte-Carlo Simulation Technique for the Evaluation of Error Rate in Digital Communication Systems , 1980, IEEE Trans. Commun..

[5] G. David Forney,et al. Coset codes-I: Introduction and geometrical classification , 1988, IEEE Trans. Inf. Theory.

[6] R. A. Carrasco,et al. New data-aided carrier and clock recovery algorithms for quadrature-quadrature phase shift keying (Q/sup 2/PSK) , 1992 .

[7] HYBRID BLOCK-CONVOLUTIONAL RATE-1/2 CODING STRATEGY FOR CONSTANT ENVELOPE (CE)Q2PSK , 1996 .

[8] Theodore G. Birdsall,et al. Quadrature-quadrature phase-shift keying , 1989, IEEE Trans. Commun..