A charge-balanced 4-wire interface for the interconnections of biomedical implants

This paper presents a charge-balanced 4-wire interface on medical platinum wires for biomedical implants. This interface was originally designed to deliver power and full duplex data between implanted units of a retinal prosthesis. Detailed circuits on both sides of the wire interface are depicted. The proposed method ensures the total electrical charge is balanced over time within the implant to avoid the risk of harmful irreversible electrochemical reactions. Experiments show that the data links using this 4-wire interface design has minimal Bit Error Rate (BER) and very low cost in terms of power and area consumptions. The forward data recovery consumes 300 μW at 600 kbps with an area of 15×200 μm2 in 65nm CMOS. The backward data encoding circuit requires an average current of a mere 3 μA at 100 kbps while its area is 15×140 μm2.

[1]  Ahmed Ben Hamida,et al.  Fully integrated CMOS data and clock recovery for wireless biomedical implants , 2011, Eighth International Multi-Conference on Systems, Signals & Devices.

[2]  Maysam Ghovanloo,et al.  Optimization of Data Coils in a Multiband Wireless Link for Neuroprosthetic Implantable Devices , 2010, IEEE Transactions on Biomedical Circuits and Systems.

[3]  Mohamad Sawan,et al.  A Highly Flexible System for Microstimulation of the Visual Cortex: Design and Implementation , 2007, IEEE Transactions on Biomedical Circuits and Systems.

[4]  Peijun Wang,et al.  Analysis of Dual Band Power and Data Telemetry for Biomedical Implants , 2012, IEEE Transactions on Biomedical Circuits and Systems.

[5]  Wonchan Kim,et al.  A Low Voltage Low Power CMOS Delay Element , 1995, ESSCIRC '95: Twenty-first European Solid-State Circuits Conference.

[6]  Shun Bai,et al.  A super low power MICS band receiver in 65 nm CMOS for high resolution epi-retinal prosthesis , 2009, 2009 IEEE 8th International Conference on ASIC.

[7]  Simon Hollis Pulse Generation for On-chip Data Transmission , 2009, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools.

[8]  Sudipto Chakraborty,et al.  A 2mW CMOS MICS-band BFSK transceiver with reconfigurable antenna interface , 2010, 2010 IEEE Radio Frequency Integrated Circuits Symposium.

[9]  Torsten Lehmann,et al.  Towards a chip scale neurostimulator: System architecture of a current-driven 98 channel neurostimulator via a two-wire interface , 2011, 2011 Annual International Conference of the IEEE Engineering in Medicine and Biology Society.

[10]  Ronald Tocci,et al.  Digital Systems: Principles and Applications , 1977 .

[11]  Mohamad Sawan,et al.  High-Speed OQPSK and Efficient Power Transfer Through Inductive Link for Biomedical Implants , 2010, IEEE Transactions on Biomedical Circuits and Systems.

[12]  Iven M. Y. Mareels,et al.  A prototype 64-electrode stimulator in 65 nm CMOS process towards a high density epi-retinal prosthesis , 2011, 2011 Annual International Conference of the IEEE Engineering in Medicine and Biology Society.

[13]  T. Tokuda,et al.  CMOS-Based Multichip Networked Flexible Retinal Stimulator Designed for Image-Based Retinal Prosthesis , 2009, IEEE Transactions on Electron Devices.

[14]  Brian Otis,et al.  4 A 120 μ W MICS / ISM-Band FSK Receiver with a 44 μ W Low-Power Mode Based on Injection-Locking and 9 x Frequency Multiplication , 2011 .