Cost-effective integration of an FN-programmed embedded flash memory into a 0.25mum SiGe: C RF-BiCMOS technology

This paper presents a process technology for cost-effective integration of low-power flash memories into a [email protected], high performance SiGe:C RF-BiCMOS process. Only four additional lithographic steps are used on top of the baseline BiCMOS process, leading to in total 23 mask levels for the BiCMOS/embedded flash process. Uniform-channel Fowler-Nordheim programmable and erasable stacked-gate cells, suitable for medium density (~Mbit) memories, are demonstrated. Peripheral high-voltage transistors, with >10V breakdown voltage, are integrated without additional mask steps on top of the flash cell integration. The flash memory integration is modular and has negligible impact on the original CMOS and HBT device parameters.

[1]  S. Saeki,et al.  Bit-line clamped sensing multiplex and accurate high voltage generator for quarter-micron flash memories , 1996, IEEE J. Solid State Circuits.

[2]  G. G. Stokes.  "J." , 1890, The New Yale Book of Quotations.

[3]  Y. Moriyama,et al.  A 0.9 V operation 2-transistor flash memory for embedded logic LSIs , 1999, 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325).

[4]  K. Yoshikawa.  Embedded flash memories-technology assessment and future , 1999, 1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453).

[5]  L. Baldi,et al.  Embedded Non Volatile Memories In Deep-Submicron CMOS , 1999, 29th European Solid-State Device Research Conference.

[6]  Dirk Wellekens,et al.  A flash memory technology with quasi-virtual ground array for low-cost embedded applications , 2001 .

[7]  Mark Horowitz,et al.  Circuit techniques for 1.5-V power supply flash memory , 1997, IEEE J. Solid State Circuits.

[8]  Kuo-Tung Chang,et al.  A novel Uniform-Channel-Program Erase (UCPE) flash EEPROM using an isolated P-well structure , 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

[9]  B. Senapati,et al.  A flexible, low-cost, high performance SiGe:C BiCMOS process with a one-mask HBT module , 2002, Digest. International Electron Devices Meeting,.