Application of Multi-ported CAM for Parallel Coding
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This paper presents a parallel coding architecture using a flexible multi-ported content addressable memory (CAM). A previously reported flexible multi-port content addressable memory (FMCAM) technology (Kumaki et al., 2004) is improved by additional schemes for a single search mode and counting value setting and enables the fast parallel coding operation. Evaluation results for Huffman encoding within the JPEG application show that the proposed architecture can reduce the required clock-cycle number by 93% is comparison to a conventional DSP. Furthermore, the performance per unit area, measured in MOPS/mm2, can be improved by a factor 3.8 in comparison to a conventional DSP
[1] T. Gyohten,et al. Area-Efficient Multi-Port SRAMs for On-Chip Data-Storage with High Random-Access Bandwidth and Large Storage Capacity , 2001 .
[2] P. Glenn Gulak,et al. Architectures for large-capacity CAMs , 1995, Integr..
[3] Takeshi Kumaki,et al. A flexible multiport content-addressable memory , 2006, Systems and Computers in Japan.