Short- and Long-Term Dynamics in a Stochastic Pulse Stream Neuron Implemented in FPGA

This paper presents the implementation of the Hebbian learning rule in a hardware-friendly architecture based on a stochastic pulse representation of the signals. We compare implementation costs and speed of this approach with those of a parallel and a bit-serial implementation. The neural model includes both short- and long-term dynamics. Hence, networks composed of these neurons solve delayed reinforcement and adaptive timing tasks which has been shown in several real-world applications.