Decreasing EEPROM programming bias with negative voltage, reliability impact
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This paper presents a study of EEPROM cell programming in order to decrease the bias polarization of the memory cell. Simulations show that it is possible to erase and write a cell with a divide up polarization, with positive and negative pulses. Measurements on a memory cell confirm these statements. Moreover simulations of the electrical field through the tunnel oxide didn't show any change of the maximum value, that means there is no impact on cell reliability. Endurance tests were performed on several memory cells with divide up polarizations. They show the same results as classical programming.
[1] Chumin Wang,et al. Light transmission in quasiperiodic multilayers of porous silicon , 2003 .
[2] B. Eitan,et al. Analysis and modeling of floating-gate EEPROM cells , 1986, IEEE Transactions on Electron Devices.