Modeling and separate extraction of bias-dependent and bias-independent S/D resistances in MOSFETs
暂无分享,去创建一个
[1] Dong Myong Kim,et al. Modeling and Separate Extraction of Gate-Bias- and Channel-Length-Dependent Intrinsic and Extrinsic Source–Drain Resistances in MOSFETs , 2011, IEEE Electron Device Letters.
[2] G.J. Hu,et al. Gate-voltage-dependent effective channel length and series resistance of LDD MOSFET's , 1987, IEEE Transactions on Electron Devices.
[3] Kyeong-Sik Min,et al. Extraction of source and drain resistances in MOSFETs using parasitic bipolar junction transistor , 2005 .
[4] Dong Myong Kim,et al. Modeling and extraction technique for parasitic resistances in MOSFETs Combining DC I–V and low frequency C–V measurement , 2012 .
[5] H. Beneking,et al. New technique for determination of static emitter and collector series resistances of bipolar transistors , 1981 .
[6] K. Terada,et al. A New Method to Determine Effective MOSFET Channel Length , 1979 .
[7] J. Ebers,et al. Large-Signal Behavior of Junction Transistors , 1954, Proceedings of the IRE.
[8] 高橋 秀俊,et al. Japanese Journal of Applied Physics , 1962, Nature.