Atomic Shared Register Access by Asynchronous Hardware (Detailed Abstract)
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The contribution of this paper is two-fold. First, we describe two ways to construct mul tivalued atomic n-writer n-reader registers. The first solution uses atomic 1-writer 1-reader registers and unbounded tags. The other solution uses atomic 1-writer n-reader registers and bounded tags. The second part of the paper develops a general methodology to prove atomicity, by identifying a set of criteria which guaranty an effective construction for the required atomic mapping. We apply the method to prove atomicity of the two implementa tions for atomic multiwriter multireader registers.
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