UHF 대역 RFID 리더 응용을 위한 주파수합성기 설계

This paper presents a 900㎒ fractional-N frequency synthesizer for radio frequency identification (RFID) reader using 0.18㎛ standard CMOS process. The IC meets the EPC Class-1 Generation-2 and ISO-18000 Type-C standards. To minimize VCO pulling, the 900㎒ VCO is generated by a 1.8㎓ VCO followed by a frequency divider. The settling time of the synthesizer is less than 20㎛. The frequency synthesizer achieves the phase noise of -105.6㏈c/㎐ at 200㎑ offset. The frequency synthesizer occupies an area of 1.8 × 0.99㎟, and dissipates 8㎃ from a low supply voltage of 1.8V.