Modeling and Optimization of Magnetic Core TSV-Inductor for On-Chip DC-DC Converter

Conventional on-chip spiral inductor consumes significant top metal routing area, thereby preventing its popularity in many on-chip applications. Recently TSV-inductor with a magnetic core has been proved to be a viable option for on-chip DC-DC converter in a 14nm test chip. The operating conditions of such inductors play a major role in maximizing the performance and efficiency of the DC-DC converter. However, due to its unique TSV-structure, unlike conventional spiral inductor, much of the modeling details remain unclear. This paper analyzes the modeling details of a magnetic core TSV-inductor and proposes a design methodology to optimize power losses of the inductor. With this methodology, designers can ensure fast and reliable inductor optimization for on-chip applications. Experimental results show that the optimized magnetic core TSV-inductor can achieve inductance density improvement of 6.0-7.7× and quality factor improvements of 1.3-1.6× while maintaining the same footprint.

[1]  G. VanAckern Design Guide for CMOS Process On-Chip 3D Inductor using Thru-Wafer Vias , 2011 .

[2]  A. J. Moll,et al.  On-chip 3D inductors using thru-wafer vias , 2012, 2012 IEEE Workshop on Microelectronics and Electron Devices.

[4]  Yiyu Shi,et al.  From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration , 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[5]  F. Brailsford Soft FerritesߞProperties and Applications , 1970 .

[6]  Kaladhar Radhakrishnan,et al.  Package Inductors for Intel Fully Integrated Voltage Regulators , 2016, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[7]  Yu Zhang,et al.  A Novel Hysteresis Core Loss Model for Magnetic Laminations , 2011, IEEE Transactions on Energy Conversion.

[8]  Glenn R. Skutt,et al.  High-Frequency Dimensional Effects in Ferrite-Core Magnetic Devices , 1996 .

[9]  Ioannis Kymissis,et al.  A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer , 2012, IEEE Journal of Solid-State Circuits.

[10]  Jianguo Zhu,et al.  Discrete modelling of magnetic cores including hysteresis, eddy current and anomalous losses , 1993 .

[11]  D. Jiles,et al.  Theory of ferromagnetic hysteresis , 1986 .

[12]  G. Rubinacci,et al.  An Efficient Numerical Model For a Magnetic Core Eddy-Current Probe , 2008, IEEE Transactions on Magnetics.

[13]  Fabrice Paillet,et al.  FIVR — Fully integrated voltage regulators on 4th generation Intel® Core™ SoCs , 2014, 2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014.

[14]  D. Jiles,et al.  Theory of ferromagnetic hysteresis (invited) , 1984 .

[15]  Xiang Li Mathematical Model for Current Transformer Based On Jiles-Atherton Theory and Saturation Detection Method , 2016 .

[16]  Andreas Weisshaar,et al.  Compact Equivalent Circuit Modeling of Microfluxgate Devices With Thin-Film Magnetic Cores , 2016, IEEE Transactions on Magnetics.

[17]  Cheng Zhuo,et al.  Silicon-Validated Power Delivery Modeling and Analysis on a 32-nm DDR I/O Interface , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[18]  Christian Martin,et al.  Power Loss Prediction and Precise Modeling of Magnetic Powder Components in DC–DC Power Converter Application , 2015, IEEE Transactions on Power Electronics.

[19]  Ki Hyeon Kim,et al.  DC bias current enhancement of multilayer chip inductors by using a nonmagnetic air gap , 2012 .

[20]  Yiyu Shi,et al.  On the Efficacy of Through-Silicon-Via Inductors , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[21]  T. Komma,et al.  The effect of different air-gap positions on the winding losses of modern planar ferrite cores in switch mode power supplies , 2008, 2008 International Symposium on Power Electronics, Electrical Drives, Automation and Motion.

[22]  Umamaheswara Rao Tida,et al.  Novel Through-Silicon-Via Inductor-Based On-Chip DC-DC Converter Designs in 3D ICs , 2014, JETC.

[23]  Hans Georg Brachtendorf,et al.  A hysteresis model for hard magnetic core materials , 1997 .

[24]  Malik Elbuluk,et al.  Fundamentals of Power Electronics , 2013 .

[25]  Xiaosen Liu,et al.  A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS , 2018, IEEE Journal of Solid-State Circuits.

[26]  Michael G. Dimopoulos,et al.  Prospects of 3D inductors on through silicon vias processes for 3D ICs , 2011, 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip.

[27]  Karthikeyan Sankaralingam,et al.  Power challenges may end the multicore era , 2013, CACM.

[28]  William T. Joines,et al.  Air-gap reluctance and inductance calculations for magnetic circuits using a Schwarz-Christoffel transformation , 1995 .

[29]  Yiyu Shi,et al.  Opportunistic through-silicon-via inductor utilization in LC resonant clocks: Concept and algorithms , 2014, 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[30]  Dok Won Lee,et al.  Fabrication and Analysis of High-Performance Integrated Solenoid Inductor With Magnetic Core , 2008, IEEE Transactions on Magnetics.