Real-time applications require an efficient scheduler supporting multiple priority levels and fast preemption. In this paper, we propose a scheduler based on the hardware-supported scheduler of transputers. Though the hardware-supported scheduler of transputers is very efficient in terms of scheduling overhead, it should be extended to support multiple priority levels and fast preemption in order to be used in real-time applications. Many schedulers have been proposed. However, they have several drawbacks in terms of scheduling overhead, preemption latency, and portability. In a previous paper (1990), the authors we have proposed a scheduler featuring low scheduling overhead and portability while suffering from a long preemption delay. In this paper, we propose an improved scheduler which greatly reduces preemption delay by using ISL (Interrupt Save Location) in transputers. Experimental results show that the improved scheduler overhead is about 13.54 /spl mu/sec and its preemption delay is well below 42 /spl mu/sec.
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