A novel design for deadzone-less fast charge pump with low harmonic content at the output
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[1] Saeed Aghtar. A new analysis of charge injection error in analog MOS switches , 1998 .
[2] M. Steyaert,et al. A fully integrated CMOS DCS-1800 frequency synthesizer , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).
[3] Chenming Hu,et al. Switch-induced error voltage on a switched capacitor , 1984 .
[4] W. Rhee,et al. Design of high-performance CMOS charge pumps in phase-locked loops , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).
[5] Oscal T.-C. Chen,et al. A power-efficient wide-range phase-locked loop , 2002, IEEE J. Solid State Circuits.
[6] J. F. Parker,et al. A 1.6-GHz CMOS PLL with on-chip loop filter , 1998, IEEE J. Solid State Circuits.
[7] Li Lin,et al. Design Techniques for High Performance Intgrated Frequency Synthesizers for Multi-standard Wireless Communication Applications , 2000 .