1 A Framework for GUI-driven Design Space Exploration of a MIPS 4 K-like processor †

EXPRESSION is an ADL (Architecture Description Language) that can capture a processormemory architecture description and generate a compiler and simulator automatically from this description. Previously many case studies have been undertaken with the goal of architecture exploration using a framework that involves manual specification of an architecture in EXPRESSION and subsequent manual intervention at various steps in the ADL to the back-end compiler and simulator flow. In this technical report we present a framework for capturing the EXPRESSION description for processors using a GUI front end tool and transforming the generated description into intermediate code to be used by the compiler and simulator engines. This automated flow requires no manual intervention at any point and allows rapid Design Space Exploration by modifying the graphical specification of the processor using the GUI. We give the example of a MIPS 4K like processor called acesMIPS which was completely captured using our automated framework and present some sample exploration studies. † This work was supported in part by Motorola Inc, NSF (CCR-020203813, CCR-0205712, ACI-0204028) and DARPA (F33615-00-C-1632).

[1]  Maria Freericks,et al.  The nml machine description formalism , 1991 .

[2]  Alexandru Nicolau,et al.  Trailblazing: A Hierarchical Approach to Percolation Scheduling , 1993, 1993 International Conference on Parallel Processing - ICPP'93.

[3]  Heinrich Meyr,et al.  LISA-machine description language and generic machine model for HW/SW co-design , 1996, VLSI Signal Processing, IX.

[4]  Srinivas Devadas,et al.  ISDL: an instruction set description language for retargetability , 1997, DAC.

[5]  Alexandru Nicolau,et al.  EXPRESSION: An ADL for system level design exploration , 1998 .

[6]  Nikil D. Dutt,et al.  EXPRESSION: a language for architecture exploration through compiler/simulator retargetability , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

[7]  Nikil D. Dutt,et al.  RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions , 2003, IEEE Trans. Very Large Scale Integr. Syst..

[8]  Asheesh Khare.  SIMPRESS: A Simulator Generation Environment for System-on-Chip Exploration , 1999 .

[9]  Nikil D. Dutt,et al.  Customizing Software Toolkits for Embedded Systems-On-Chip , 2000, DIPES.

[10]  Nikil Dutt,et al.  Memory Subsystem Description in EXPRESSION , 2000 .

[11]  Nikil D. Dutt,et al.  V-SAT: A visual specification and analysis tool for system-on-chip exploration , 2001, J. Syst. Archit..

[12]  Aviral Shrivastava,et al.  A customizable compiler framework for embedded systems , 2001 .