Implementation and Analysis of Biological Synaptogenesis Technique on Nodes and Interconnects for NoC Fault Tolerance

Bio-inspired Network on Chip (NoC) fault tolerant techniques are a novel way of solving the complex faulty situation in NoC. The excessive and parallel communication requirements of heterogeneous processing elements (PE’s) in NoC have made the communication structure very complex. The size of the devices are scaled down to support the complexity but the size of interconnects remains the same. Due to this interconnects have contributed to faults. Different fault tolerant techniques have been proposed. But all these conventional algorithms have drawbacks of adaptiveness and robustness. The proposed synaptogensis based bio-inspired technique is based on one of the characteristics of biological brain. This technique is robust as it makes the NoC fault-tolerant and able to reconfigure upon detection of router or interconnect faults. In this paper, two techniques based on synaptogensis algorithm have been critically analyzed. In improved algorithm, the packet network latency was reduced to 34.62%, bandwidth was efficiently utilized by 5.03% and throughput was increased by 36.36%. The bio-inspired algorithm has better accepted traffic rate as compared to the traditional fault tolerant technique.

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