An IRAM architecture for image analysis and pattern recognition

A new intelligent RAM (IRAM) architecture based on embedding DRAM memory and many simple processors on a chip is introduced. While the architecture can perform massively-parallel computation, it can also be used as plain DRAM. Some key parts of the architecture are discussed, and examples of image analysis algorithms that can run on it are given.

[1]  Jon A. Webb,et al.  High performance computing in image processing and computer vision , 1994, Proceedings of the 12th IAPR International Conference on Pattern Recognition, Vol. 2 - Conference B: Computer Vision & Image Processing. (Cat. No.94CH3440-5).

[2]  Noah Treuhaft,et al.  Scalable Processors in the Billion-Transistor Era: IRAM , 1997, Computer.

[3]  Linda G. Shapiro,et al.  Fast parallel object recognition , 1994, Proceedings of the 12th IAPR International Conference on Pattern Recognition, Vol. 2 - Conference B: Computer Vision & Image Processing. (Cat. No.94CH3440-5).

[4]  S. Van Singel,et al.  Logic-enhanced memories for data-intensive processing , 1995, Records of the 1995 IEEE International Workshop on Memory Technology, Design and Testing.

[5]  Anil K. Jain,et al.  On-line fingerprint verification , 1996, Proceedings of 13th International Conference on Pattern Recognition.

[6]  Tom Blank,et al.  The MasPar MP-1 architecture , 1990, Digest of Papers Compcon Spring '90. Thirty-Fifth IEEE Computer Society International Conference on Intellectual Leverage.