Effects of Low-Temperature Operation on the Performance of MOSFETs

The existing compact models can reproduce the characteristics of MOSFETs in the temperature range of −40oC to 125oC. Some applications require circuits to operate over a wide temperature range consisting of temperatures below the specified range of existing compact models, requiring wide temperature range compact models for the design of such circuits. In order to develop wide temperature range compact models, fourteen different geometries of n-channel and p-channel MOSFETs manufactured in a 0.18μm mixed-signal process were electrically characterized over a temperature range of 40 K to 298 K. Electrical characterization included ID-VG and ID-VD under different drain, body and gate biases respectively. The effects of low-temperature operation on the performance of 0.18μm MOSFETs have been studied and discussed in terms of sub-threshold characteristics, threshold voltage, the effect of the body bias and linearity of the device. As it is well understood, the subthreshold slope, the threshold voltage, drive currents of the MOSFETs increase when the temperature of the MOSFETs is lowered, which makes it advantageous to operate the MOSFETs at low-temperatures. However the internal linearity (gm1/gm3) of the MOSFETs degrades as the temperature of the MOSFETs is lowered, and the performance of the MOSFETs can be affected by the interface traps that exist in higher density close to conduction band and valence band energy levels, as the Fermi-level moves closer to bandgap edges when MOSFETs are operated at cryogenic temperatures.

[1]  G. Gildenblat,et al.  Measurements and modeling of the n-channel MOSFET inversion layer mobility and device characteristics in the temperature range 60-300 K , 1990 .

[2]  Yoon-Ha Jeong,et al.  Low-Temperature Performance of Nanoscale MOSFET for Deep-Space RF Applications , 2008, IEEE Electron Device Letters.

[3]  N. Goldsman,et al.  Compact and Distributed Modeling of Cryogenic Bulk MOSFET Operation , 2010, IEEE Transactions on Electron Devices.

[4]  M. Peckerar,et al.  Device Modeling at Cryogenic Temperatures: Effects of Incomplete Ionization , 2007, IEEE Transactions on Electron Devices.

[5]  Hao Jin,et al.  Passivation and Depassivation of Si – SiO2 Interfaces with Atomic Hydrogen , 2009 .

[6]  R.C. Jaeger,et al.  MOSFET behavior and circuit considerations for analog applications at 77 K , 1987, IEEE Transactions on Electron Devices.

[7]  R. Keyes,et al.  The role of low temperatures in the operation of logic circuitry , 1970 .

[8]  J. Reboul,et al.  CCD Readout of infrared hybrid focal-plane arrays , 1980, IEEE Transactions on Electron Devices.

[9]  Y. Tsividis.  Operation and modeling of the MOS transistor , 1987 .

[10]  J.Y.C. Sun,et al.  IIIB-1 degradation of 77-K MOSFET characteristics due to channel hot electrons , 1984, IEEE Transactions on Electron Devices.

[11]  Richard C. Jaeger,et al.  Temperature dependent threshold behavior of depletion mode MOSFETs: Characterization and simulation☆ , 1979 .

[12]  Narain D. Arora,et al.  MOSFET Modeling for VLSI Simulation - Theory and Practice , 2006, International Series on Advances in Solid State Electronics and Technology.

[13]  Spencer,et al.  Temperatures on europa from galileo photopolarimeter-radiometer: nighttime thermal anomalies , 1999, Science.

[14]  D. R. Deverell,et al.  Operation of a CMOS microprocessor while immersed in liquid nitrogen , 1986 .

[15]  G. Gildenblat,et al.  MOS flat-band capacitance method at low temperatures , 1989 .

[16]  P. V. Gray,et al.  DENSITY OF SiO2–Si INTERFACE STATES , 1966 .

[17]  G. Gildenblat,et al.  PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation , 2006, IEEE Transactions on Electron Devices.

[18]  N. Arora,et al.  A semi-empirical model of the MOSFET inversion layer mobility for low-temperature operation , 1987, IEEE Transactions on Electron Devices.

[19]  A. Boudou,et al.  A High-Performance N-MOS Adder Designed for Optimized Cryogenic Operation , 1986 .

[20]  K.J.S. Cave,et al.  MOS (Metal Oxide Semiconductor) Physics and Technology , 1983 .

[21]  Yuan Taur,et al.  Submicrometer-channel CMOS for low-temperature operation , 1987, IEEE Transactions on Electron Devices.

[22]  V. L. Rideout,et al.  Very small MOSFET's for low-temperature operation , 1977, IEEE Transactions on Electron Devices.

[23]  T. Chan,et al.  Experimental characterization and modeling of electron saturation velocity in MOSFETs inversion layer from 90 to 350 K , 1990, IEEE Electron Device Letters.

[24]  A. V. Der Ziel,et al.  Thermal Noise in Field-Effect Transistors , 1962, Proceedings of the IRE.

[25]  J. Woo,et al.  Short-channel effects in MOSFET's at liquid-Nitrogen temperature , 1986, IEEE Transactions on Electron Devices.

[26]  D. Schroder.  Semiconductor Material and Device Characterization , 1990 .

[27]  G. Gildenblat,et al.  Investigation of cryogenic CMOS performance , 1985, 1985 International Electron Devices Meeting.

[28]  J.S.T. Huang,et al.  Switching characteristics of scaled CMOS circuits at 77 K , 1987, IEEE Transactions on Electron Devices.

[29]  F.H. De La Moneda,et al.  Measurement of MOSFET constants , 1982, IEEE Electron Device Letters.

[30]  E. Sánchez-Sinencio,et al.  A Highly Linear Low-Noise Amplifier , 2006, IEEE Transactions on Microwave Theory and Techniques.

[31]  Chris Van Hoof,et al.  A Cryogenic ADC operating Down to 4.2K , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[32]  Fat D. Ho,et al.  A numerical model for MOSFET's from liquid-nitrogen temperature to room temperature , 1995 .

[33]  S. Hanamura,et al.  Operation of Bulk CMOS Devices at Very Low Temperatures , 1983, 1983 Symposium on VLSI Technology. Digest of Technical Papers.

[34]  D. Monroe,et al.  Passivation of interface-states in large-area Si devices using hydrogen implantation , 2003, IEEE Electron Device Letters.

[35]  4.2K CMOS circuit design for digital readout of Single Electron Transistor electrometry , 2010, 2010 53rd IEEE International Midwest Symposium on Circuits and Systems.