Mechanism of Moldable Underfill(MUF) process for fan-out wafer level packaging

Increasing challenges are faced to ensure moldability with rapid advances in flip chip technology such as decreasing bump pitch and stand-off height, especially when commercial Moldable Underfill (MUF) is used. The conventional way to detect the voids is to use C-Scan or Thru-Scan to acquire the voids shape and location after MUF process. The whole MUF process is like a black box and the mechanism of the voids formation is unknown. However, in our study Ansys Fluent commercial software was used to track the transient transformation of the voids and made the whole process transparent. The melting front of epoxy molding compound (EMC) was tracked by volume of fluid (VOF) method. In the whole study, only one phase, EMC, is incompressible. The other phase, void, is regarded as the compressible material and complies idea gas law. An actual wafer with the array of flip chip packages including the bumps would demand a large amount of elements and very high computational resources. Our simulation shed light on solving this issue by the simplified modeling. Due to our simulation results shows that filling efficiency is location independent, 4 packages instead of fully populated hundreds of packages are used to carry out the simulations. Structured grids are used for each bump to achieve a better converge during the calculation. In the final part, the mechanism of MUF process is investigated. The results show that the voids will be minimized after the inner pressure and outer pressure reaches a balance. Form inner side, initial vacuum pressure is very critical; from outside, packing force is very critical.