High voltage tolerant output buffer design for mixed voltage interfaces

This paper presents the design of a mixed voltage 3.3V/5.5V CMOS output buffer. The proposed design technique eliminates gate-oxide overstress and output to supply current flow when common bus voltage is higher than the supply voltage. While this paper discusses the 3.3V/5.5V supply combination as an example, the same circuit topology can be used for other mixed supply combination like 2.5V/5V, 1.8V/3.3V.

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