Performance of current mirror with high-k gate dielectrics

This work compares the performance of the basic current mirror topology by using two different materials for gate dielectrics, the conventional SiON and an Hf-based high-k dielectrics. The impact of gate leakage and of channel length modulation on the basic current mirror operation is described. It is shown that in the case of SiON gate dielectrics with an equivalent oxide thickness (EOT) of 1.4nm, it is not possible to find a value for the channel length which allows a good trade-off to be obtained while minimizing the gate leakage and reducing the channel length modulation. On the other hand, the study demonstrates that in the case of HfSiON gate dielectrics with similar EOT, appropriate L values can be found obtaining very high output impedance current sources with reduced power consumption owing to low leakage and most of all with better parameter predictability.

[1]  L. Colombo,et al.  Carrier mobility in MOSFETs fabricated with Hf-Si-O-N gate dielectric, polysilicon gate electrode, and self-aligned source and drain , 2002, IEEE Electron Device Letters.

[2]  B. Nauta,et al.  Analog circuits in ultra-deep-submicron CMOS , 2005, IEEE Journal of Solid-State Circuits.

[3]  Antonio Torralba,et al.  Low supply voltage high-performance CMOS current mirror with low input and output voltage requirements , 2004, IEEE Transactions on Circuits and Systems II: Express Briefs.

[4]  Phillip E Allen,et al.  CMOS Analog Circuit Design , 1987 .

[5]  Howard R. Huff,et al.  High dielectric constant materials : VLSI mosfet applications , 2005 .

[6]  Luigi Colombo,et al.  Application of HfSiON as a gate dielectric material , 2002 .

[7]  Jaime Ramirez-Angulo,et al.  Compact implementation of high-performance CMOS current mirror , 2005 .

[8]  Xuguang Zhang,et al.  A regulated body-driven CMOS current mirror for low-voltage applications , 2004, IEEE Transactions on Circuits and Systems II: Express Briefs.

[9]  Behzad Razavi,et al.  Design of Analog CMOS Integrated Circuits , 1999 .

[10]  V. Ramgopal Rao,et al.  Analog circuit performance issues with aggressively scaled gate oxide CMOS technologies , 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).

[11]  Guido Groeseneken,et al.  Electrical properties of high-κ gate dielectrics: Challenges, current issues, and possible solutions , 2006 .

[12]  Z. Ren,et al.  Inversion channel mobility in high-/spl kappa/ high performance MOSFETs , 2003, IEEE International Electron Devices Meeting 2003.

[13]  P. E. Allen,et al.  Low-voltage analog IC design in CMOS technology , 1995 .