Uniformity improvements of low current 1T1R RRAM arrays through optimized verification strategy

This paper systematically analyzed and optimized the operation parameters of low current 1T1R RRAM arrays. Considering both thermal and electrical field driven effects, a current and voltage joint verification strategy has been proposed. Highly uniform multilevel resistive switching performances with LRS resistance higher than 100kΩ and HRS resistance higher than 10MΩ were obtained on 130nm CMOS process fabricated 1T1R RRAM arrays using the optimized verification strategy.