Architecture of a real-time video signal processor
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This paper describes a new architecture for a multi-processing system which accomplishes video rate operations on inputs from television cameras or VTRs, and also presents the experimental system for this called a Real-Time Video Signal Processor (RTVP). The system which consists of identical processing units (PUs) performs in a wide range of image processing applications. System performance is increased in proportion to the number of the PUs that are connected together using simple uni-directional video transfer lines. The replicated memory system is adopted, which means that the same image data are written into the frame memory of each PU, so that the problem of memory access confliction may be eliminated. The experimental system RTVP is designed to work in a 7.16MHz instruction cycle, and process two video signal inputs at a pixel rate of 3.58MHz. The hardware of each PU includes a 25,000 gate random logic circuit and a 1.6Mbit memory.
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