Analog Signal Processing Circuits Using Floating Gate MOS Transistors

Low voltage non-linear computational circuits useful for analog VLSI signal processing applications based on floating gate MOS transistors (FGMOSFETs) are presented. The FGMOS transistors operate in the saturation region. The variable equivalent threshold voltage (VT) of the FGMOS transistor is exploited in such a way to transform it to a simple MOSFET of zero VT. A bias circuit using a conventional VT extractor circuit makes the transformation. The transistor behaves as a simple squaring element in this case. A four-quadrant multiplier and a Euclidean norm calculator circuit are presented as applications. The most important advantages of the four-quadrant multiplier are rail-to-rail dynamic input range, low distortion and very good linearity. The main advantages of the Euclidean norm calculator circuit are unipolar supply voltage, linear expansion requiring only one FGMOS per additional input and very good linearity. SPICE simulation results verify the accuracy of the circuits. Index Terms – Floating gate MOSFETs, VT cancellation circuit, four-quadrant multiplier, Euclidean norm calculator circuit, analog VLSI signal processing.

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