Distributed Simulation of AADL Specifications in a Polychronous Model of Computation

Architecture Analysis and Design Language (AADL) is used to describe the hardware and software architectures of embedded applications at the system level. The implementation of such systems is often distributed across asynchronous communication infrastructures. Such a distributed system is usually composed of locally synchronous processes communicating in a globally asynchronous manner, a GALS system. Yet, in a step-wise refinement based approach, one would prefer to model, simulate and validate such a system in a synchronous programming framework, and then automatically generate its GALS implementation. In this paper, we present a methodology to implement such an approach using the polychronous (multiclocked synchronous) model of computation of the data-flow synchronous language SIGNAL.We show how to model partially asynchronous application and to generate distributed simulation code starting from system-level AADL specifications.

[1]  Hisashi Kobayashi,et al.  Modeling and analysis , 1978 .

[2]  Pascal Raymond,et al.  The synchronous data flow programming language LUSTRE , 1991, Proc. IEEE.

[3]  Eugenio Villar,et al.  Specification for SystemC-AADL interoperability , 2007, 2007 Fifth Workshop on Intelligent Solutions in Embedded Systems.

[4]  The SAE Architecture Analysis & Design Language ( AADL ) Standard , .

[5]  P. Dissaux.  AADL Model Transformations , 2005 .

[6]  Thierry Gautier,et al.  Virtual prototyping AADL architectures in a polychronous model of computation , 2008, 2008 6th ACM/IEEE International Conference on Formal Methods and Models for Co-Design.

[7]  Abdoulaye Gamatié,et al.  Synchronous modeling of avionics applications using the SIGNAL language , 2003, The 9th IEEE Real-Time and Embedded Technology and Applications Symposium, 2003. Proceedings..

[8]  Mamoun Filali,et al.  Fiacre: an Intermediate Language for Model Verification in the Topcased Environment , 2008 .

[9]  Philippe Dhaussy,et al.  AADL Execution Semantics Transformation for Formal Verification , 2008, 13th IEEE International Conference on Engineering of Complex Computer Systems (iceccs 2008).

[10]  Peter H. Feiler,et al.  Embedded System Architecture Analysis Using SAE AADL , 2004 .

[11]  Message Passing Interface Forum.  MPI: A message - passing interface standard , 1994 .

[12]  Thierry Gautier,et al.  Programming real-time applications with SIGNAL , 1991, Proc. IEEE.

[13]  Raffaela Mirandola,et al.  Modeling and Analysis of Non-functional Properties in Component-based Systems , 2003, Electron. Notes Theor. Comput. Sci..

[14]  Message P Forum,et al.  MPI: A Message-Passing Interface Standard , 1994 .

[15]  Frédéric Boussinot,et al.  The ESTEREL language , 1991, Proc. IEEE.

[16]  Albert Benveniste,et al.  A Protocol for Loosely Time-Triggered Architectures , 2002, EMSOFT.

[17]  Stephen A. Edwards,et al.  The synchronous languages 12 years later , 2003, Proc. IEEE.

[18]  Albert Benveniste,et al.  Concurrency in Synchronous Systems , 2006, Formal Methods Syst. Des..

[19]  Peter H. Feiler,et al.  The Architecture Analysis & Design Language (AADL): An Introduction , 2006 .

[20]  Jean-Christophe Le Lann,et al.  POLYCHRONY for System Design , 2003, J. Circuits Syst. Comput..

[21]  Paul Le Guernic,et al.  Compositional design of isochronous systems , 2008, 2008 Design, Automation and Test in Europe.

[22]  Sébastien Gérard,et al.  MARTE: Also an UML Profile for Modeling AADL Applications , 2007, 12th IEEE International Conference on Engineering Complex Computer Systems (ICECCS 2007).